Silicon synapse designs for VLSI neuromorphic platform

dc.contributor.authorNguyen Duc Bui Phong
dc.contributor.authorMasoud Daneshtalab
dc.contributor.authorSergei Dytckov
dc.contributor.authorJuha Plosila
dc.contributor.authorHannu Tenhunen
dc.contributor.organizationfi=matemaattis-luonnontieteellinen tiedekunta|en=Faculty of Science|
dc.contributor.organizationfi=ohjelmistotekniikka|en=Software Engineering|
dc.contributor.organizationfi=sulautettu elektroniikka|en=Embedded Electronics|
dc.contributor.organization-code1.2.246.10.2458963.20.20754768032
dc.contributor.organization-code1.2.246.10.2458963.20.36798383026
dc.contributor.organization-code2606802
dc.contributor.organization-code2606804
dc.converis.publication-id2101820
dc.converis.urlhttps://research.utu.fi/converis/portal/Publication/2101820
dc.date.accessioned2022-10-27T12:15:24Z
dc.date.available2022-10-27T12:15:24Z
dc.description.abstract<div> Analog silicon neurons were proven to be a promising solution for VLSI neuromorphic platform to implement massively scalable computing systems. They possess the advantages of consuming less power and silicon area than digitally designed neurons. This paper compares the differences in power and area consumption between two methods of synapse design for analog neuron models: time-based modulation and current-based modulation. The obtained results demonstrate that under the same technology process (ST CMOS 65nm), the neuron that uses time-based modulation consumes less power (almost six times) and silicon area (about thirty times) but higher energy (twelve times) than that of the current-based modulation</div>
dc.format.pagerange1
dc.format.pagerange6
dc.identifier.isbn978-1-4799-5443-8
dc.identifier.olddbid174259
dc.identifier.oldhandle10024/157353
dc.identifier.urihttps://www.utupub.fi/handle/11111/34055
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7004745
dc.identifier.urnURN:NBN:fi-fe2021042714466
dc.language.isoen
dc.okm.affiliatedauthorDytckov, Sergei
dc.okm.affiliatedauthorDaneshtalab, Masoud
dc.okm.affiliatedauthorPlosila, Juha
dc.okm.affiliatedauthorTenhunen, Hannu
dc.okm.discipline213 Electronic, automation and communications engineering, electronicsen_GB
dc.okm.discipline213 Sähkö-, automaatio- ja tietoliikennetekniikka, elektroniikkafi_FI
dc.okm.internationalcopublicationinternational co-publication
dc.okm.internationalityInternational publication
dc.okm.typeA4 Conference Article
dc.relation.conferenceNordic microelectronics conference
dc.relation.doi10.1109/NORCHIP.2014.7004745
dc.source.identifierhttps://www.utupub.fi/handle/10024/157353
dc.titleSilicon synapse designs for VLSI neuromorphic platform
dc.title.book32nd NORCHIP Conference 27-28 October 2014, Tampere, Finland
dc.year.issued2014

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