A fully integrated 2:1 self-oscillating switched-capacitor DC-DC converter in 28 nm UTBB FD-SOI
| dc.contributor.author | Matthew Turnquist | |
| dc.contributor.author | Markus Hiienkari | |
| dc.contributor.author | Jani Mäkipää | |
| dc.contributor.author | Lauri Koskinen | |
| dc.contributor.organization | fi=Technology Research Center TRC|en=Technology Research Center TRC| | |
| dc.contributor.organization-code | 1.2.246.10.2458963.20.58905910210 | |
| dc.contributor.organization-code | 2609060 | |
| dc.converis.publication-id | 29655761 | |
| dc.converis.url | https://research.utu.fi/converis/portal/Publication/29655761 | |
| dc.date.accessioned | 2022-10-27T11:45:18Z | |
| dc.date.available | 2022-10-27T11:45:18Z | |
| dc.description.abstract | <p>The importance of energy-constrained processors continues to grow especially for ultra-portable sensor-based platforms for the Internet-of-Things (IoT). Processors for these IoT applications primarily operate at near-threshold (NT) voltages and have multiple power modes. Achieving high conversion efficiency within the DC–DC converter that supplies these processors is critical since energy consumption of the DC–DC/processor system is proportional to the DC–DC converter efficiency. The DC–DC converter must maintain high efficiency over a large load range generated from the multiple power modes of the processor. This paper presents a fully integrated step-down self-oscillating switched-capacitor DC–DC converter that is capable of meeting these challenges. The area of the converter is 0.0104 mm<sup>2</sup> and is designed in 28 nm ultra-thin body and buried oxide fully-depleted SOI (UTBB FD-SOI). Back-gate biasing within FD-SOI is utilized to increase the load power range of the converter. With an input of 1 V and output of 460 mV, measurements of the converter show a minimum efficiency of 75% for 79 nW to 200 µW loads. Measurements with an off-chip NT processor load show efficiency up to 86%. The converter’s large load power range and high efficiency make it an excellent fit for energy-constrained processors.<br /></p> | |
| dc.identifier.eissn | 2079-9268 | |
| dc.identifier.jour-issn | 2079-9268 | |
| dc.identifier.olddbid | 171914 | |
| dc.identifier.oldhandle | 10024/155008 | |
| dc.identifier.uri | https://www.utupub.fi/handle/11111/29510 | |
| dc.identifier.url | http://www.mdpi.com/2079-9268/6/3/17 | |
| dc.identifier.urn | URN:NBN:fi-fe2021042718757 | |
| dc.language.iso | en | |
| dc.okm.affiliatedauthor | Turnquist, Matthew | |
| dc.okm.affiliatedauthor | Dataimport, Microelectronics | |
| dc.okm.affiliatedauthor | Koskinen, Lauri | |
| dc.okm.discipline | 213 Electronic, automation and communications engineering, electronics | en_GB |
| dc.okm.discipline | 213 Sähkö-, automaatio- ja tietoliikennetekniikka, elektroniikka | fi_FI |
| dc.okm.internationalcopublication | not an international co-publication | |
| dc.okm.internationality | International publication | |
| dc.okm.type | A1 ScientificArticle | |
| dc.publisher | MDPI AG | |
| dc.publisher.country | Switzerland | en_GB |
| dc.publisher.country | Sveitsi | fi_FI |
| dc.publisher.country-code | CH | |
| dc.relation.doi | 10.3390/jlpea6030017 | |
| dc.relation.ispartofjournal | Journal of Low Power Electronics and Applications | |
| dc.relation.issue | 3 | |
| dc.relation.volume | 6 | |
| dc.source.identifier | https://www.utupub.fi/handle/10024/155008 | |
| dc.title | A fully integrated 2:1 self-oscillating switched-capacitor DC-DC converter in 28 nm UTBB FD-SOI | |
| dc.year.issued | 2016 |
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