Engineering the bottom electrode to enhance functionality in GCMO memristors

Abstract

The development of the history of society via complementary metal-oxide-semiconductor (CMOS) transistor scaling under Moore's Law is currently attaining a conclusive high point due to significant physical and economic limitations. Quantum tunnelling makes it difficult to scale down devices because it leads to power loss and overheating. Rising manufacturing and cooling costs threaten long-term computing growth. The Von Neumann architecture has kept processors and memory apart since 1945. This has made modular design possible, but it has also caused the Von Neumann bottleneck, which is a slow, high-power-consuming data transfer. This limit makes modern workloads worse, and people are more interested in brain-inspired artificial neural networks because of it. Even with improvements like graphics processing units (GPUs) and tensor processing units (TPUs), traditional CMOS systems still have problems with scaling and energy use because of the Von Neumann bottleneck. Neuromorphic computing solves this problem by combining memory and processing, which makes brain-like computation possible. Memristors are strong candidates for neuromorphic computing as they emulate neurons and synapses through history-dependent conductance changes. They also provide fast switching, low power consumption, and high reliability, making them suitable for next-generation memory.

In this thesis, I have studied the fabrication process of Gd₀.₂Ca₀.₈MnO₃ (GCMO) with different buffer layers such as Nb-doped STO (Nb:STO) and SrRuO₃ (SRO) between SrTiO₃ (STO) substrate and GCMO. Additionally, Nb-doped STO (Nb:STO) has been utilised as a substrate (no buffer layer) in one sample and another sample with STO (no buffer layer). The fabrication methods that were used in this thesis were pulsed laser deposition (PLD), photolithography with etching, and electron beam evaporation (E-beam). Four samples were fabricated using these methods. The structural characterisation of the fabricated sample was performed mainly using X-ray diffraction (XRD) and atomic force microscopy (AFM), with GCMO growth and surface quality checks. And the result shows a good growth of GCMO on top of the substrate and buffer layers. The electrical transport measurements using Keithley and ArC ONE indicated some variation in resistance and current at the final device connection of each fabricated sample. For the electrical characterisation, these designs for memristive properties need further study, as the device-to-device variation was not as expected.

This study compares buffered and unbuffered samples to understand how the bottom electrode influences the growth of GCMO and the memristive properties of the GCMO memristor. This work is important for optimising device performance and improving the design of future neuromorphic applications.